As I thought about how to summarize
my week at EUPVSEC 24
in Hamburg, I
decided to (mostly) not talk about what record efficiency results were reported
by what group. This type of information is already reported by many other blog
posts, press releases, and news aggregators, and specific efficiency numbers
can be misleading taken out of context. For these sorts of numerical summaries
I recommend checking out this
PDF of Heinz Ossenbrink's summary presentation given on Friday at
EUPVSEC.
Instead, I'm going to
summarize my impressions of the show in several technical areas, and talk about
other things that may be harder to get a feeling for by just reading the
published papers later. This post will also primarily focus on the
technical and poster sessions and related discussions, not the trade show. If
you have any questions, feel free to email me at mdavis (at)
greenmountainengineering.com, or leave a comment on this blog post.
As this is a fairly long
post, here is an overview of the topics:
- Silicon cells and modules
- Thin film
- Wafer equivalent thick film / thin film cells
- Reflectors
- Characterization and modeling
- Inverters and grid interconnections
- Other technologies
- Changes in the business climate [future blog
post]
Silicon
cells and modules:
There
continues to be substantial exploration of—and room for innovation in—new cell
designs and manufacturing-scalable fabrication processes in the primary solar
technology: crystalline silicon. This includes improved or lower-cost materials
(for example, adaptation of metallurgical-grade silicon to solar cells,
reduction of the effects of Boron-Oxygen defects in p-type material, and so
on), as well as improvements in cell architecture (such as improved texturing
for light trapping, metallization, selective emitters, surface passivation, and
more significant changes in cell architectures such as rear-contact cells and
heterojunctions).
While
a variety of improvements in all of these areas have been demonstrated by
research groups in the past and integrated into some manufacturing processes, a
number of proposed improvements have not yet been widely adopted. This is both
because there is still engineering to be done to come up with scalable,
cost-effective implementations, and because any new material or process comes
with some technical risk and thus must be demonstrated as reliable in the field
before major scale-up. Selective emitters do continue to be an area of
scale-up, with at least one Chinese manufacturer now using them in a production
module design, and other companies selling turnkey wafer manufacturing lines
that include a particular selective emitter process.
Progress
also continues to be made on fabrication of thinner silicon wafers (e,g, Silicon Genesis’s cleaving
process, as well as a number of wire saw optimization projects), and cells
(a number of presentations were made on results obtained on cells 120 microns
or thinner, including Sanyo’s poster on their impressive >22% efficient,
98um-thick cell based on their HIT technology).
However,
reliable, high-yield integration of cells this thin into modules will be a
challenge. Towards this end, the EU Crystal Clear project—particularly, sub-project
5: modules—showed some success using rear contact cells with electrically-conductive
adhesives and a printed-circuit-board-style backplane to enable a
lower-temperature, closer-packed, lower-stress method of module fabrication.
Advent Solar is also an example of a company integrating rear contact cells
onto a backplane (described
and shown in a video on their web site).
Image: ECN monolithic backplane for use with rear contact cells
There
were also a number of companies discussing—and in some cases demonstrating
manufacturing tools for—non-contact metallization techniques (e.g. jet printing
combined with electroplating, for example), other non-contact processing
techniques (e.g. laser soldering, use of laser ablation or jet-printed resists
for patterning of dielectrics), and low-stress wafer handling methods.
Non-contact
processing techniques are one way of reducing wafer damage during processing,
but there are a range of other challenges to fabricating reliable modules with
thin cells.
Thin
Films
There
were fewer presentations on CdTe and CIGS than I’m used to at conferences,
though that doesn’t mean that substantial work isn’t being done in that area; the
thin-film production leader First Solar rarely presents at conferences, for
example, and we’ve worked with a number of other CIGS and CdTe startups at
various levels of stealth that also choose not to present on their work.
There
were a number of presentations on thin-film silicon, though, both from research
groups and manufacturers. In summary, groups are getting to stabilized module
efficiencies of 6 - 7% for a-si (amorphous silicon) and 8.0 - 9.5% for micromorph (a tandem junction a-si/uc-si). But there
are many measurement and reporting details to look at carefully when people
report thin-film silicon efficiencies (e.g. initial vs. stabilized, aperture
area vs. full area, overall size, and what the deposition rate was and how
reasonable a throughput that is for manufacturing– to name just a few). I'll comment
further on interpreting and understanding thin-film efficiencies in a future
blog post
Thick
Films / Wafer Equivalent Thin Films
One
of the most notable changes—which may partly just be a change in my perception—was
the number of people pursuing what were sometimes called “wafer equivalent”
devices. These are crystalline cells typically in the 10-30um thickness range,
grown on a substrate (one example architecture is shown below).
Image: one architecture for wafer-replacement crystalline silicon, presentation 3CO.6.3 by NREL
For example, a cell could be grown by gas-phase epitaxy on a lower-quality metallurgical-grade silicon cell “template”. Or, an amorphous silicon layer could be deposited on a substrate by some rapid, lower-than-usual-quality CVD process and then crystallized, using a laser, metal-induced crystallization, or solid phase crystallization. These methods could even be combined, to deposit and crystallize a thin seed layer by one technique, and then use epitaxy to grow a thicker crystalline layer on top of the seed layer. Companies like CSG Solar have pursued one approach towards polysilicon cells (deposition of a-si on glass followed by solid phase crystallization), but there a variety of significantly different approaches being pursued—this is a fairly broad technical category.
There
were a number of presentations in this field, and I’m also aware of a number of
stealth companies pursuing variations on these techniques. I find this
interesting because the semiconductor industry has addressed similar challenges
in the past, and there is potential for the solar industry to bring in
experience from research in the IC and LCD TFT backplane industries.
Reflectors
Reflectors
are important for improved light trapping in technologies including thin-film
modules, thick-film “wafer equivalent” cells described above, and even
conventional multicrystalline silicon wafers.. This is an area where there will
continue to be significant development beyond the basic chemical texture etches
that are effective for single-crystalline silicon wafers.
Materials,
Characterization, and Modeling
Most
of the usual characterization techniques for materials, cells, and modules were
discussed, such as EBIC, EBSD, SIMS, XRD, IR imaging of various types, EL
(electroluminescence), PL (photoluminescence), Raman spectroscopy, and so on. But I also saw presentations
on some methods new to me, such as: photoelasticity (a mechanical-optical
method for examining defects by looking at the stress fields produced by them)
and Dynamic ILM (infrared lifetime mapping, but based on a chopped light source
and looking at the shape of the resulting waveform).
There
were also a number of discussions about dopants and impurities in silicon, as
well as various methods for characterizing, modeling, and reducing the effects
of them.
Inverters
and grid integration:
The
European inverter standard EN50530 has finally been released, and includes some
provisions for how to characterize the behavior of inverters’ MPPT (maximum
power point tracking) algorithms, a method by which the inverter tries to
operate a solar module at the current and voltage of maximum power rather than
at a fixed voltage.
As
solar (and other intermittent-supply renewable energy technologies such as
wind) grows to be a more significant contribution to electricity production in
some countries, utilities are taking it more seriously. This leads to
additional requirements (and opportunities to add value) for inverters,
including the ability to supply reactive power and in other ways contribute to
grid stability, as well as the ability to stay connected and ride through low
voltage events or grid failures, in part to avoid cascading shutdowns of more
and more plants if grid voltage drops (Germany has learned some lessons in this
area with the growth of the wind industry there and some grid issues).
Other
Technologies:
Some
further progress has been made in areas such as intermediate band cells (using
quantum dots or bulk materials) and organic photovoltaics, as well as in
building integrated PV, but I don’t see any of these becoming significant in
the near term. That is not to say they
won’t have niches that are profitable for the companies involved, but they are
unlikely to contribute a significant portion of the total gigawatts of
installed PV capacity.
